An active matrix-type display device displays an image by selecting pixel circuits by row out of pixel circuits that are arranged two-dimensionally, and writing voltages according to display data in the selected pixel circuits. In order to select pixel circuits by row, a shift register that sequentially shifts an output signal based on a clock signal is used as a scanning signal line drive circuit. For a display device performing dot sequential driving, a shift register of the same type is provided within a data signal line drive circuit.
Further, for a liquid crystal display device and the like, a scanning signal line drive circuit is often formed integrally with a pixel circuit using a manufacturing process for forming a TFT (Thin Film Transistor) in a pixel circuit. In such a case, it is preferable that, in order to reduce manufacturing costs, a shift register which functions as the scanning signal line drive circuit be formed with transistors of the same conductivity type as the TFT (specifically, an N-channel type transistor).
A shift register configured with N-channel type transistors utilizes a bootstrap circuit shown in FIG. 18 in order to output a clock signal at an unchanged voltage level. In the circuit shown in FIG. 18, when an input signal IN changes from low level to high level, a potential of a node N9 also changes to high level via a diode connected transistor 92, turning a transistor 91 to an ON state. Then, when the input signal IN changes to low level, the transistor 92 is turned to an OFF state and the node N9 becomes in a floating state, but the transistor 91 keeps the ON state.
When a clock signal CK changes from low level to high level in this condition, the potential of the node N9 increases up to about (2×Vck) (where Vck is amplitude of the clock signal CK) due to an effect of a capacitor 93 which exists between a gate and a source of the transistor 91 (bootstrap effect). Therefore, the clock signal CK having the amplitude Vck passes the transistor 91 without causing a voltage drop, and the clock signal CK is outputted from an output terminal OUT at the unchanged voltage level.
A shift register including a bootstrap circuit is described in Patent Documents 1 to 3, for example.